Abstract
A 1-1-1 MASH ΔΣ Time-to-Digital Converter (TDC) with 6ps time resolution is implemented in 0.13μm CMOS. It achieves an ENOB of 13b and a wide input range of 100ns. The TDC exhibits stability within a temperature range of -20 to 120°C, which credits to the use of an on-chip bandgap reference and passive RC oscillators. A novel delay-line assisted online calibration technique is introduced to mitigate the skew error caused by the large comparator delay. The chip consumes only 0.7mW from 1.2V supply, and occupies 0.08mm 2 area (core).
Original language | English |
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Title of host publication | 2011 Proceedings of Technical Papers |
Subtitle of host publication | IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011 |
Pages | 361-364 |
Number of pages | 4 |
DOIs | |
State | Published - 2011 |
Event | 2011 - A-SSCC: 7th IEEE Asian Solid State Circuits Conference - Jeju Duration: 14 Nov 2011 → 16 Nov 2011 http://www.asscc.org/2011/ |
Publication series
Name | 2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011 |
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Conference
Conference | 2011 - A-SSCC |
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Abbreviated title | A-SSCC 2011 |
Country/Territory | Korea, Republic of |
City | Jeju |
Period | 2011-11-14 → 2011-11-16 |
Internet address |
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering