A 0.7mW 13b temperature-stable MASH ΔΣ TDC with delay-line assisted calibration

Ying Cao, Paul Leroux, Wouter De Cock, Michiel Steyaert

    Research outputpeer-review


    A 1-1-1 MASH ΔΣ Time-to-Digital Converter (TDC) with 6ps time resolution is implemented in 0.13μm CMOS. It achieves an ENOB of 13b and a wide input range of 100ns. The TDC exhibits stability within a temperature range of -20 to 120°C, which credits to the use of an on-chip bandgap reference and passive RC oscillators. A novel delay-line assisted online calibration technique is introduced to mitigate the skew error caused by the large comparator delay. The chip consumes only 0.7mW from 1.2V supply, and occupies 0.08mm 2 area (core).

    Original languageEnglish
    Title of host publication2011 Proceedings of Technical Papers
    Subtitle of host publicationIEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011
    Number of pages4
    StatePublished - 2011
    Event2011 - A-SSCC: 7th IEEE Asian Solid State Circuits Conference - Jeju
    Duration: 14 Nov 201116 Nov 2011

    Publication series

    Name2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011


    Conference2011 - A-SSCC
    Abbreviated titleA-SSCC 2011
    Country/TerritoryKorea, Republic of
    Internet address

    ASJC Scopus subject areas

    • Hardware and Architecture
    • Electrical and Electronic Engineering

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