TiO(2)/HfO(2) Bi-Layer Gate Stacks Grown by Atomic Layer Deposition for Germanium-Based Metal-Oxide-Semiconductor Devices Using GeO(x)N(y) Passivation Layer

Qi Xie, Jan Musschoot, Marc Schaekers, Matty Caymax, Annelies Dellabie, Dennis Lin, Xin-Ping Qu, Yu-Long Jiang, Sven Van den Berghe, Christophe Detavernier

    Research outputpeer-review

    Abstract

    Material and electrical properties of TiO(2)/HfO(2) bi-layer gate stacks were investigated for germanium (Ge) based metal-oxide-semiconductor devices. In situ NH(3) plasma treatment was employed to passivate the Ge surface and promising performance including low capacitance-voltage hysteresis and interface trap density was achieved. It shows a superior dielectric breakdown voltage (4.2-3.4 V) for the TiO(2)/HfO(2) bi-layer stacks than HfO(2) single layer stack at a similar capacitance equivalent thickness (CET) of 1.6 nm. A minimum CET of 1.4 nm was obtained for capacitors on both p and n-type Ge (100) with a gate leakage current density <4 x 10(-7) A/cm(2) at V(FB) +/- 1 V.
    Original languageEnglish
    Pages (from-to)G27-G30
    JournalElectrochemical and Solid State Letters
    Volume14
    Issue number5
    DOIs
    StatePublished - Jun 2011

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