Material and electrical properties of TiO(2)/HfO(2) bi-layer gate stacks were investigated for germanium (Ge) based metal-oxide-semiconductor devices. In situ NH(3) plasma treatment was employed to passivate the Ge surface and promising performance including low capacitance-voltage hysteresis and interface trap density was achieved. It shows a superior dielectric breakdown voltage (4.2-3.4 V) for the TiO(2)/HfO(2) bi-layer stacks than HfO(2) single layer stack at a similar capacitance equivalent thickness (CET) of 1.6 nm. A minimum CET of 1.4 nm was obtained for capacitors on both p and n-type Ge (100) with a gate leakage current density <4 x 10(-7) A/cm(2) at V(FB) +/- 1 V.
|Journal||Electrochemical and Solid State Letters|
|State||Published - Jun 2011|